06 November 2013

Beyond 7nm and silicon: The first III-V CMOS wafers roll off production lines

Imec, perhaps the world’s top semiconductor research center, has created the first monolithic III-V CMOS transistors on 300mm silicon wafers. With current silicon-based transistors hitting a wall at around 14nm, this accomplishment is probably the biggest step towards CMOS scaling down to 7nm and below.

As we’ve covered in the past, III-V semiconductors (alloys made from metals in old groups III and V) have long been known as a potential replacement for silicon in CMOS transistors. III-V semiconductors, such as indium gallium arsenide (InGaAs), have much higher electron mobility than silicon, and can thus be fashioned into faster, smaller, and lower-power transistors. Compound semiconductors, as they are known, are already used in high-performance settings such as military radio transceivers but they’ve never made the leap to consumer products, due to production cost, defect density, and other factors.

Imec’s III-V FinFET, and a graph showing its performance

Now, it seems, Imec has succeeded in using a current, state of the art CMOS process to produce III-V FinFETs on 300mm silicon wafers. This is exciting, because it sounds like Imec’s III-V process is compatible with current computer chip manufacturing techniques. At this juncture, it’s important to note that Imec is partnered with just about every big player in the CMOS industry, including Intel, TSMC, GlobalFoundries, Samsung, Micron, and SK Hynix. The basic idea is that Imec, with resources from its partners, works to solve major problems sub-22nm CMOS, extreme ultraviolet lithography, etc. and then that research filters back to the partners.

To create the III-V FinFETs, Imec started with a conventional 300mm silicon wafer covered in FinFETs with silicon fins. Current FinFET processes, such as Intel’s 22nm and 14nm or TSMC’s 16nm, use silicon as the fin. The problem is, silicon fins can only be made so thin, ultimately affecting how small the transistor is. III-V semiconductors, by virtue of their better electrical properties, can be be a lot thinner. We don’t have a lot of details, but Imec says its process replaces these silicon fins with indium gallium arsenide (InGaAs) and indium phosphide (InP). Apparently the resulting III-V FinFETs show “excellent performance.”

When it comes to smaller and faster transistors, despite all of the headline-grabbing graphene and nanotube stories, there are just three options for the next five to 10 years: Germanium (high electron mobility), complex metal oxides, and III-V semiconductors. With this advance, it seems that III-V has taken the lead. If Imec and its partners can commercialize its III-V process, it could arrive just as silicon runs out of steam in the next few years.

Now read: Graphene photodetectors integrated into CMOS silicon chips, could herald new optoelectronic era


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